CPC H10N 50/10 (2023.02) [H01L 21/762 (2013.01); H01L 21/76802 (2013.01); H10N 50/80 (2023.02); H10N 35/01 (2023.02)] | 6 Claims |
1. A method for fabricating semiconductor device, comprising:
forming a first magnetic tunneling junction (MTJ) on a substrate;
forming a first top electrode on the first MTJ;
forming a first ultra low-k (ULK) dielectric layer on the first MTJ;
performing a first etching process to remove part of the first ULK dielectric layer and form a damaged layer on the first ULK dielectric layer while the first ULK dielectric layer covers the first MTJ and directly contacts a top surface of the first top electrode; and
forming a second ULK dielectric layer on the damaged layer.
|