US 11,706,911 B2
Method of fabricating semiconductor memory having a second active region disposed at an outer side of a first active region
Janbo Zhang, Quanzhou (CN); Enping Cheng, Quanzhou (CN); Li-Wei Feng, Quanzhou (CN); and Yu-Cheng Tung, Quanzhou (CN)
Assigned to Fujian Jinhua Integrated Circuit Co., Ltd., Quanzhou (CN)
Filed by Fujian Jinhua Integrated Circuit Co., Ltd., Quanzhou (CN)
Filed on Jul. 5, 2022, as Appl. No. 17/858,055.
Application 17/858,055 is a division of application No. 17/336,275, filed on Jun. 1, 2021, granted, now 11,424,247.
Claims priority of application No. 202110495955.9 (CN), filed on May 7, 2021; and application No. 202120962589.9 (CN), filed on May 7, 2021.
Prior Publication US 2022/0359527 A1, Nov. 10, 2022
Int. Cl. H10B 12/00 (2023.01)
CPC H10B 12/34 (2023.02) [H10B 12/053 (2023.02); H10B 12/482 (2023.02); H10B 12/485 (2023.02)] 15 Claims
OG exemplary drawing
 
1. A method of forming a semiconductor memory device, comprising;
providing a substrate;
forming an active structure in the substrate, the active structure comprising:
a first active region comprising a plurality of active region units parallel with each other and extending along a first direction; and
a second active region disposed at an outer side of the first active region, the second active region comprising a first edge extending along a second direction and a second edge extending along a third direction, and the first edge and the second edge directly connected to a portion of the active region units, wherein the second active region comprises a plurality of first openings, and the first openings are disposed on the second edge; and
forming a shallow trench isolation in the substrate, the shallow trench isolation surrounding the active structure.