CPC H04N 19/53 (2014.11) [H04N 19/105 (2014.11); H04N 19/139 (2014.11); H04N 19/176 (2014.11); H04N 19/523 (2014.11)] | 25 Claims |
1. A video codec device, comprising:
a memory containing instructions; and
a processor in communication with the memory and, upon execution of the instructions, is configured to perform the operations of:
determining that a prediction mode of a to-be-processed picture block is not an affine motion model-based merge mode;
obtaining control point motion vectors of the to-be-processed picture block, wherein the control point motion vectors have a preset first motion vector resolution and/or a first motion vector bit depth, wherein the obtaining control point motion vectors of the to-be-processed picture block comprises:
obtaining control point motion vector differences (CPMVDs) and the control point motion vector predictors (CPMVPs); and
based on a resolution of the CPMVDs being not equal to the first motion vector resolution, obtaining the control point motion vectors of the to-be-processed picture block based on the CPMVDs and a first shift value; or
based on a resolution of the CPMVPs being not equal to the first motion vector resolution, obtaining the control point motion vectors of the to-be-processed picture block based on the CPMVPs and a second shift value;
deriving a motion vector of each motion compensation unit in the to-be-processed picture block based on the control point motion vectors of the to-be-processed picture block; and
obtaining a reconstructed block of the to-be-processed picture block based on the motion vector of each motion compensation unit in the to-be-processed picture block.
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