CPC H04B 1/58 (2013.01) [H04B 1/44 (2013.01)] | 12 Claims |
1. A wireless communication chip, comprising:
an analog front-end circuit, comprising:
a first transceiver circuit, coupled to a first antenna, and arranged to transmit or receive signals through the first antenna; and
a second transceiver circuit, coupled to a second antenna, and arranged to transmit or receive signals through the second antenna; and
a baseband circuit, arranged to control the first transceiver circuit to use a first band or a second band for communication, and/or control the second transceiver circuit to use the first band or the second band for communication;
wherein the baseband circuit controls the first transceiver circuit and the second transceiver circuit so that the analog front-end circuit alternately performs two transmit and two receive paths (2T2R) in the first band and 2T2R in the second band through both of the first antenna and the second antenna;
wherein time division multiple access (TDMA) is utilized to achieve the 2T2R in the first band and the 2T2R in the second band;
wherein a time length of each time slot in the wireless communication chip is half of a transmission interval of a beacon in the first band, and the time length of said each time slot in the wireless communication chip is half of a transmission interval of another beacon in the second band.
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