US 11,705,413 B2
Semiconductor package having improved thermal interface between semiconductor die and heat spreading structure
Chia-Hao Hsu, Hsinchu (TW); Tai-Yu Chen, Hsinchu (TW); Shiann-Tsong Tsai, Hsinchu (TW); Hsing-Chih Liu, Hsinchu (TW); Yao-Pang Hsu, Hsinchu (TW); Chi-Yuan Chen, Hsinchu (TW); and Chung-Fa Lee, Hsinchu (TW)
Assigned to MEDIATEK INC., Hsin-Chu (TW)
Filed by MEDIATEK INC., Hsin-Chu (TW)
Filed on Dec. 14, 2021, as Appl. No. 17/549,901.
Application 17/549,901 is a continuation of application No. 16/742,850, filed on Jan. 14, 2020, granted, now 11,227,846.
Claims priority of provisional application 62/881,423, filed on Aug. 1, 2019.
Claims priority of provisional application 62/798,589, filed on Jan. 30, 2019.
Prior Publication US 2022/0102297 A1, Mar. 31, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 27/14 (2006.01); H01L 23/66 (2006.01); H01L 23/367 (2006.01); H01L 23/373 (2006.01); H01L 23/498 (2006.01); H01L 23/00 (2006.01); H01Q 1/02 (2006.01); H01Q 1/22 (2006.01)
CPC H01L 23/66 (2013.01) [H01L 23/3672 (2013.01); H01L 23/3733 (2013.01); H01L 23/49822 (2013.01); H01L 23/49838 (2013.01); H01L 24/16 (2013.01); H01Q 1/02 (2013.01); H01Q 1/2283 (2013.01); H01L 2223/6677 (2013.01); H01L 2224/16227 (2013.01); H01L 2924/0103 (2013.01); H01L 2924/014 (2013.01); H01L 2924/0105 (2013.01); H01L 2924/01029 (2013.01); H01L 2924/01047 (2013.01); H01L 2924/01049 (2013.01); H01L 2924/01051 (2013.01); H01L 2924/01083 (2013.01); H01L 2924/18161 (2013.01)] 12 Claims
OG exemplary drawing
 
1. A printed circuit board assembly, comprising:
a print circuit board (PCB) having an upper surface directly facing the lower surface of the base, wherein the PCB comprises an array of conductive thermal pads on the upper surface of the PCB, a plurality of thermal vias within the PCB under the array of conductive thermal pads, a heat spreading structure mounted onto a lower surface of the PCB, wherein the heat spreading structure is in thermal contact with the plurality of thermal vias; and
a semiconductor package mounted on the array of conductive thermal pads, the semiconductor package comprising:
a base comprising an upper surface and a lower surface that is opposite to the upper surface;
a radio-frequency (RF) module embedded near the upper surface of the base;
an integrated circuit (IC) die mounted on the lower surface of the base in a flip-chip manner so that a backside of the IC die is available for heat dissipation;
a plurality of conductive structures disposed on the lower surface of the base and arranged around the IC die; and
a metal thermal interface layer comprising a backside metal layer that is in contact with the backside of the IC die, and a solder paste conformally printed on the backside metal layer, wherein the solder paste is in direct contact with the array of conductive thermal pads, wherein the array of conductive thermal pads comprises slits between the thermal pads and the slits are filled with the solder paste.