US 11,705,368 B2
Manufacturing method of chip package and chip package
Chia-Sheng Lin, Taoyuan (TW); Hui-Hsien Wu, Taoyuan (TW); Jian-Hong Chen, Taoyuan (TW); Tsang-Yu Liu, Zhubei (TW); and Kuei-Wei Chen, Taoyuan (TW)
Assigned to XINTEC INC., Taoyuan (TW)
Filed by XINTEC INC., Taoyuan (TW)
Filed on Jul. 13, 2021, as Appl. No. 17/373,773.
Application 17/373,773 is a division of application No. 16/668,570, filed on Oct. 30, 2019, granted, now 11,121,031.
Claims priority of provisional application 62/900,949, filed on Sep. 16, 2019.
Claims priority of provisional application 62/754,349, filed on Nov. 1, 2018.
Prior Publication US 2021/0343591 A1, Nov. 4, 2021
Int. Cl. H01L 21/768 (2006.01); H01L 23/00 (2006.01); H01L 21/02 (2006.01)
CPC H01L 21/76894 (2013.01) [H01L 21/02013 (2013.01); H01L 24/94 (2013.01)] 4 Claims
OG exemplary drawing
 
1. A manufacturing method of a chip package, comprising:
attaching a side of a package structure to a first adhesive tape, wherein the package structure is a wafer level package structure to be cut into a plurality of chip packages that each comprises a chip, the package structure has a carrier facing away from the side and a wafer between the carrier and the first adhesive tape, and the carrier has a top surface which is a plane;
cutting the package structure from the top surface of the carrier with a modified laser such that the package structure is cut from a top surface of the package structure to a bottom surface of the package structure;
attaching a second adhesive tape to the top surface of the carrier;
removing the first adhesive tape; and
expanding the second adhesive tape to divide the package structure into a plurality of chip packages, wherein each of the chip packages has a continuous sidewall that is flat and extends from a top surface of one of the chip packages to a bottom surface of said one of the chip packages.