US 11,705,207 B2
Processor in non-volatile storage memory
Luis Vitorio Cargnini, San Jose, CA (US); and Viacheslav Anatolyevich Dubeyko, San Jose, CA (US)
Assigned to WESTERN DIGITAL TECHNOLOGIES, INC., San Jose, CA (US)
Filed by WESTERN DIGITAL TECHNOLOGIES, INC., San Jose, CA (US)
Filed on Nov. 24, 2020, as Appl. No. 17/103,695.
Application 17/103,695 is a continuation of application No. 15/395,474, filed on Dec. 30, 2016, granted, now 10,885,985.
Prior Publication US 2021/0082520 A1, Mar. 18, 2021
Int. Cl. G11C 16/24 (2006.01); G11C 16/10 (2006.01)
CPC G11C 16/24 (2013.01) [G11C 16/10 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A computing system, comprising:
a plurality of non-volatile memory units configured to store corresponding data, and instruction sets for performing different operations, each of the instruction sets comprising a plurality of sequentially-executable instructions for performing one of the different operations;
a plurality of first processing units respectively configured to manipulate data within an addressable location of a corresponding non-volatile memory unit of the plurality of non-volatile memory units, the addressable locations being respectively associated with different instructions of the plurality of sequentially-executable instructions, the plurality of first processing units being configured to concurrently execute the different instructions for a respective operation within the corresponding non-volatile memory units; and
at least one second processing unit respectively including the plurality of non-volatile memory units and the plurality of first processing units, the at least one second processing unit being configured to perform the different operations in a sequence on the corresponding data and to reorder, during the sequence, the different operations based on instruction sets most frequently used relative to each other.