US 11,705,200 B2
Van der Waals heterostructure memory device and switching method
Wei Chen, Singapore (SG); Du Xiang, Singapore (SG); and Tao Liu, Singapore (SG)
Assigned to National University of Singapore and, Jiangsu (CN); and National University of Singapore (Suzhou) Research, Jiangsu (CN)
Filed by National University of Singapore, Singapore (SG); and National University of Singapore (Suzhou) Research Institute, Jiangsu (CN)
Filed on Jun. 3, 2021, as Appl. No. 17/338,074.
Claims priority of application No. 10202005480Y (SG), filed on Jun. 10, 2020.
Prior Publication US 2021/0391009 A1, Dec. 16, 2021
Int. Cl. G11C 13/04 (2006.01); H10B 63/00 (2023.01); H10N 70/00 (2023.01); H10N 70/20 (2023.01)
CPC G11C 13/047 (2013.01) [H10B 63/30 (2023.02); H10N 70/011 (2023.02); H10N 70/257 (2023.02); H10N 70/8825 (2023.02); H10N 70/8828 (2023.02); H10N 70/8833 (2023.02)] 17 Claims
OG exemplary drawing
 
1. A method of switching between first and second states of a van der Waals heterostructure, vdWH, memory device comprising a first two-dimensional, 2D, material and a second 2D material with an interface therebetween, the method comprising the steps of:
exposing the interface to a laser beam while applying an erase voltage signal across the interface for creating interfacial states according to a first storage state of the memory device;
and applying a write voltage signal across the interface for modulating the interfacial states according to a second state of the memory device,
wherein the vdHW memory devive comprises the second 2D material as a channel on the first 2D material in a field-effect transistor configuration comprising a gate electrode, a source electrode and a drain electrode, and the method comprises applying the erase voltage signal to the gate electrode with a zero bias voltage between the source electrode and the drain electrode.