US 11,705,046 B2
Data driver with sample/hold circuit and display device including the same
Young Soo Hwang, Hwaseong-si (KR); Joon Chul Goh, Suwon-si (KR); Oh Jo Kwon, Suwon-si (KR); Ki Duk Kim, Daejeon (KR); Jeong Min Kim, Seoul (KR); Bong Hyun You, Seoul (KR); Hyung Min Lee, Seoul (KR); and Seung Hun Choi, Gunpo-si (KR)
Assigned to SAMSUNG DISPLAY CO., LTD., Yongin-si (KR); and KOREA UNIVERSITY RESEARCH & BUSINESS FOUNDATION, Seoul (KR)
Filed by SAMSUNG DISPLAY CO., LTD., Yongin-si (KR); and Korea University Research and Business Foundation, Seoul (KR)
Filed on Sep. 10, 2021, as Appl. No. 17/471,997.
Claims priority of application No. 10-2020-0135436 (KR), filed on Oct. 19, 2020.
Prior Publication US 2022/0122513 A1, Apr. 21, 2022
Int. Cl. G09G 3/20 (2006.01)
CPC G09G 3/2092 (2013.01) [G09G 2310/027 (2013.01); G09G 2310/0291 (2013.01); G09G 2310/0294 (2013.01); G09G 2310/08 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A data driver, comprising:
a digital-to-analog converter configured to convert a digital data signal to an analog data voltage;
a buffer configured to output the data voltage; and
a multi-channel sample/hold circuit electrically connected between the digital-to-analog converter and the buffer, the multi-channel sample/hold circuit including a first sample/hold circuit connected to a first channel and a second sample/hold circuit connected to a second channel, wherein:
the first sample/hold circuit is configured to have a source-follower structure to perform a first drive operation of sampling the data voltage as a buffer input voltage and maintaining the buffer input voltage during an nth horizontal time, and configured to perform a second drive operation of outputting the buffer input voltage to an output terminal of the buffer during an (n+1)th horizontal time, wherein the output terminal of the buffer is selectively coupled to the first sample/hold circuit along a first feedback line; and
the second sample/hold circuit is configured to perform the second drive operation during the nth horizontal time and to perform the first drive operation during the (n+1)th horizontal time, where n is an integer greater than or equal to 1, wherein the output terminal of the buffer is selectively coupled to the second sample/hold circuit along a second feedback line.