US 11,704,546 B2
Operation processing apparatus that calculates addresses of feature planes in layers of a neutral network and operation processing method
Shiori Wakino, Tokyo (JP)
Assigned to CANON KABUSHIKI KAISHA, Tokyo (JP)
Filed by CANON KABUSHIKI KAISHA, Tokyo (JP)
Filed on Jun. 30, 2020, as Appl. No. 16/916,507.
Claims priority of application No. 2019-123135 (JP), filed on Jul. 1, 2019.
Prior Publication US 2021/0004667 A1, Jan. 7, 2021
Int. Cl. G06N 3/063 (2023.01); G06T 1/20 (2006.01); G06T 1/60 (2006.01); G06N 3/045 (2023.01)
CPC G06N 3/063 (2013.01) [G06N 3/045 (2023.01); G06T 1/20 (2013.01); G06T 1/60 (2013.01)] 8 Claims
OG exemplary drawing
 
1. An operation processing apparatus for performing operation processing in a plurality of layers of a hierarchical neural network, comprising:
an operation unit configured to perform the operation processing to generate a feature plane in a layer of the plurality of layers;
a feature plane holding unit including a plurality of memories that hold the feature plane generated by the operation unit;
a memory access management unit configured to select a memory from the plurality of memories and specify an address for an element of the feature plane, and write the element of the feature plane in the specified address in the selected memory based on network information which includes information about the layer in which the feature plane has been generated and to manage reading from and writing to the plurality of memories; and
a processor connected to the feature plane holding unit via a bus,
wherein the plurality of memories in the feature plane holding unit are mapped at addresses in a memory space, and
wherein the processor calculates, based on the network information, an address of the feature plane in the memory space, and reads out the feature plane from the calculated address in the memory space.