US 11,704,544 B2
Integrated circuit chip device and related product
Tianshi Chen, Beijing (CN); Shaoli Liu, Beijing (CN); Bingrui Wang, Beijing (CN); and Yao Zhang, Beijing (CN)
Assigned to CAMBRICON TECHNOLOGIES CORPORATION LIMITED, Beijing (CN)
Filed by Cambricon Technologies Corporation Limited, Beijing (CN)
Filed on Nov. 27, 2019, as Appl. No. 16/698,000.
Application 16/698,000 is a continuation in part of application No. PCT/CN2018/125801, filed on Dec. 29, 2018.
Claims priority of application No. 201711499265.0 (CN), filed on Dec. 30, 2017; application No. 201711499266.5 (CN), filed on Dec. 30, 2017; application No. 201711499267.X (CN), filed on Dec. 30, 2017; and application No. 201711499268.4 (CN), filed on Dec. 30, 2017.
Prior Publication US 2020/0175357 A1, Jun. 4, 2020
Int. Cl. G06N 3/063 (2023.01); G06F 16/22 (2019.01); G06F 16/25 (2019.01); G06N 3/04 (2023.01); G06N 3/082 (2023.01)
CPC G06N 3/063 (2013.01) [G06F 16/22 (2019.01); G06F 16/258 (2019.01); G06N 3/04 (2013.01); G06N 3/082 (2013.01)] 14 Claims
OG exemplary drawing
 
1. An integrated circuit chip device, comprising a primary processing circuit and a plurality of basic processing circuits, wherein
each of the basic processing circuits includes a compression mapping circuit configured to perform compression on each data in a neural network operation;
the primary processing circuit is configured to perform operations of the neural network in series and transmit the data to the plurality of basic processing circuits; and
the plurality of basic processing circuits are configured to start the compression mapping circuits to perform compression on transmitted data according to an operation of the data; the plurality of basic processing circuits are further configured to perform operations of the neural network in series according to the data or compressed data, and transmit results to the primary processing circuit,
wherein the primary processing circuit is configured to obtain data blocks that are to be computed and an operation instruction, and divide the data blocks that are to be computed into a data block for distribution and a data block for broadcasting according to the operation instruction; and the primary processing circuit is further configured to split the data block for distribution to obtain a plurality of basic data blocks, distribute the plurality of basic data blocks to circuits connected to the primary processing circuit, and broadcast the data block for broadcasting to circuits connected to the primary processing circuit;
wherein the basic processing circuits are configured to control a starting of the compression mapping circuits to perform compression on the basic data blocks and the data block for broadcasting according to the operation, then perform an inner product operation to obtain an operation result, and transmit the operation result to the primary processing circuit; and
wherein the primary processing circuit is configured to process the operation result to obtain the data blocks that are to be computed and an instruction result of the operation instruction;
wherein the data blocks that are to be computed are at least one input neuron and/or at least one weight to be computed,
wherein the compression mapping circuit includes a second sparse processing unit, a third sparse processing unit, and a connection relation processing unit;
wherein the second sparse processing unit is configured to receive third input data, obtain first connection relation data according to the third input data, and transmit the first connection relation data to the connection relation processing unit;
wherein the third sparse processing unit is configured to receive fourth input data, obtain second connection relation data according to the fourth input data, and transmit the second connection relation data to the connection relation processing unit;
wherein the connection relation processing unit is configured to obtain third connection relation data according to the first connection relation data and the second connection relation data, and transmit the third connection relation data to a second data processing unit;
wherein the second data processing unit is configured to compress the third input data and the fourth input data according to the third connection relation data after receiving the third input data, the fourth input data and the third connection relation data, so as to obtain fourth output data and fifth output data; wherein
when the third input data includes at least one input neuron and the fourth input data includes at least one weight, the first connection relation data is connection relation data of the input neuron, and the second connection relation data is connection relation data of the weight, the fourth output data is a processed input neuron, and the fifth output data is a processed weight when the third input data includes at least one weight, and the fourth input data includes at least one input neuron, the first connection relation data is connection relation data of the weight, the second connection relation data is connection relation data of the input neuron, the fourth output data is a processed weight, and the fifth output data is a processed input neuron.