CPC G06F 30/398 (2020.01) [G06F 30/394 (2020.01); H01L 27/0207 (2013.01); G06F 30/18 (2020.01); G06F 2111/04 (2020.01); G06F 2111/20 (2020.01); G06F 2119/18 (2020.01)] | 21 Claims |
1. A method for fabricating an electronic device onto a semiconductor substrate, the method comprising:
receiving, by a computer system, a standard cell library having a standard cell and a standard cell variation corresponding to the standard cell from a semiconductor foundry, the standard cell and the standard cell variation were developed to occupy different arrangements of a plurality of legal sites of the electronic architectural design;
developing, by the computer system, an electronic architectural design for the electronic device utilizing the standard cell library;
forming, by the computer system, one or more semiconductor devices of the electronic device within or onto the semiconductor substrate in accordance with the electronic architectural design;
forming, by the computer system, one or more local interconnections in accordance with the electronic architectural design for electrically connecting the one or more semiconductor devices; and
forming, by the computer system, one or more global interconnections between the one or more local interconnections in accordance with the electronic architectural design to form the electronic device.
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