US 11,704,472 B2
Standard cells and variations thereof within a standard cell library
Sheng-Hsiung Chen, Zhubei (TW); Jerry Chang-Jui Kao, Taipei (TW); Fong-Yuan Chang, Hsinchu County (TW); Po-Hsiang Huang, Tainan (TW); Shao-Huan Wang, Taichung (TW); XinYong Wang, Shanghai (TW); Yi-Kan Cheng, Taipei (TW); and Chun-Chen Chen, Hsinchu County (TW)
Assigned to Taiwan Semiconductor Manufacutring Co., Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Nov. 10, 2021, as Appl. No. 17/523,600.
Application 17/523,600 is a continuation of application No. 16/912,061, filed on Jun. 25, 2020, granted, now 11,182,533.
Application 16/912,061 is a continuation of application No. 15/800,693, filed on Nov. 1, 2017, granted, now 10,741,539, issued on Aug. 11, 2020.
Claims priority of provisional application 62/552,049, filed on Aug. 30, 2017.
Prior Publication US 2022/0067266 A1, Mar. 3, 2022
Int. Cl. G06F 30/00 (2020.01); G06F 30/398 (2020.01); G06F 30/394 (2020.01); H01L 27/02 (2006.01); G06F 111/04 (2020.01); G06F 30/18 (2020.01); G06F 119/18 (2020.01); G06F 111/20 (2020.01)
CPC G06F 30/398 (2020.01) [G06F 30/394 (2020.01); H01L 27/0207 (2013.01); G06F 30/18 (2020.01); G06F 2111/04 (2020.01); G06F 2111/20 (2020.01); G06F 2119/18 (2020.01)] 21 Claims
OG exemplary drawing
 
1. A method for fabricating an electronic device onto a semiconductor substrate, the method comprising:
receiving, by a computer system, a standard cell library having a standard cell and a standard cell variation corresponding to the standard cell from a semiconductor foundry, the standard cell and the standard cell variation were developed to occupy different arrangements of a plurality of legal sites of the electronic architectural design;
developing, by the computer system, an electronic architectural design for the electronic device utilizing the standard cell library;
forming, by the computer system, one or more semiconductor devices of the electronic device within or onto the semiconductor substrate in accordance with the electronic architectural design;
forming, by the computer system, one or more local interconnections in accordance with the electronic architectural design for electrically connecting the one or more semiconductor devices; and
forming, by the computer system, one or more global interconnections between the one or more local interconnections in accordance with the electronic architectural design to form the electronic device.