US 11,704,218 B2
Information processing apparatus and information processing method to analyze a state of dynamic random access memory (DRAM)
Hiroyoshi Ooshima, Yokohama (JP); and Tetsuo Uchiyama, Chiba (JP)
Assigned to Canon Kabushiki Kaisha, Tokyo (JP)
Filed by CANON KABUSHIKI KAISHA, Tokyo (JP)
Filed on Apr. 17, 2020, as Appl. No. 16/852,246.
Claims priority of application No. 2019-083241 (JP), filed on Apr. 24, 2019.
Prior Publication US 2020/0341879 A1, Oct. 29, 2020
Int. Cl. G06F 11/32 (2006.01); G06F 11/30 (2006.01); G11C 11/4076 (2006.01); G11C 11/406 (2006.01)
CPC G06F 11/322 (2013.01) [G06F 11/3027 (2013.01); G06F 11/3037 (2013.01); G11C 11/4076 (2013.01); G11C 11/40622 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An information processing apparatus comprising:
a processor and a memory in communication with each other and to perform operations including:
detecting an event which causes a state of at least one bank constituting dynamic random access memory (DRAM) to transition,
classifying, as a first classification, the state of the at least one bank based on the detected event,
classifying, as a second classification, a state of the DRAM based on the state of the at least one bank, and
causing statistical information that is based on the state of the at least one bank or the state of the DRAM to be displayed with respect to a predetermined unit time,
wherein the state of the at least one bank and the state of the DRAM each includes at least one of the following: an operating state, in which data is being transferred, an inoperative state, in which transfer of data is not possible due to a predetermined constraint, or a pause state, in which, although there is no constraint, data is not being transferred.