US 11,704,024 B2
Multi-level wear leveling for non-volatile memory
Ying Yu Tai, Mountain View, CA (US); Ning Chen, San Jose, CA (US); and Jiangli Zhu, San Jose, CA (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Jul. 27, 2020, as Appl. No. 16/947,291.
Application 16/947,291 is a continuation of application No. 16/110,739, filed on Aug. 23, 2018, granted, now 10,761,739.
Prior Publication US 2020/0356283 A1, Nov. 12, 2020
Int. Cl. G06F 3/06 (2006.01); G06F 12/10 (2016.01)
CPC G06F 3/0616 (2013.01) [G06F 3/065 (2013.01); G06F 3/0659 (2013.01); G06F 3/0679 (2013.01); G06F 12/10 (2013.01); G06F 2212/1036 (2013.01); G06F 2212/202 (2013.01); G06F 2212/657 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A method comprising:
performing, by a processing device, a first media management operation among a plurality of individual data units of a memory device after a first interval, the first media management operation comprising a first algebraic mapping function; and
performing, by the processing device, a second media management operation among a plurality of first-level groups of individual data units in a hierarchy of groups of the memory device after a second interval, wherein the second interval is different than the first interval, wherein at least one first-level group of the plurality of first-level groups comprises the plurality of individual data units, the second media management operation comprising a second algebraic mapping function, and wherein the second algebraic mapping function is different than the first algebraic mapping function.