| CPC G04R 20/04 (2013.01) [G04R 20/28 (2013.01)] | 13 Claims |
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1. A timepiece comprising:
a clock circuit;
a signal receiver configured to receive a signal that includes time information; and
a processor configured to:
perform a changing operation of attempting to receive the signal that includes the time information and changing a current time measured by the clock circuit based on the time information; and
perform a presenting operation to indicate whether or not the changing operation is successful,
wherein the processor is configured to:
set a first flag in response to the signal receiver successfully receiving the signal that includes the time information;
clear the first flag in response to a date of a current time counted by the clock circuit being changed;
set a second flag in response to the signal receiver successfully receiving the signal that includes the time information, where the second flag remains set even when the date of the current time counted by the clock circuit changes;
perform the changing operation based on the first flag being cleared; and
perform the presenting operation within a predetermined period of time based on the second flag remaining set even when the date of the current time counted by the clock circuit changes.
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