US 11,702,738 B2
Chamber processes for reducing backside particles
Yi Zhou, Fremont, CA (US); Xinyue Chen, Sunnyvale, CA (US); Mukul Khosla, San Jose, CA (US); and Yangchung Lee, Santa Clara, CA (US)
Assigned to Applied Materials, Inc., Santa Clara, CA (US)
Filed by Applied Materials, Inc., Santa Clara, CA (US)
Filed on May 17, 2021, as Appl. No. 17/322,242.
Prior Publication US 2022/0364227 A1, Nov. 17, 2022
Int. Cl. C23C 16/44 (2006.01); C23C 16/455 (2006.01); C23C 16/40 (2006.01); H01J 37/32 (2006.01)
CPC C23C 16/4404 (2013.01) [C23C 16/401 (2013.01); C23C 16/4405 (2013.01); C23C 16/45557 (2013.01); H01J 37/32477 (2013.01); H01J 37/32853 (2013.01); H01J 37/32862 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method of semiconductor processing, the method comprising:
performing a first plasma treatment within a processing chamber to remove a first carbon-containing material;
performing a second plasma treatment within the processing chamber to remove a first silicon-containing material;
increasing a processing pressure between performing the first plasma treatment and performing the second plasma treatment;
depositing a second silicon-containing material on surfaces of the processing chamber, wherein the second silicon-containing material is characterized by a water contact angle of greater than or about 90°; and
depositing a second carbon-containing material overlying the second silicon-containing material.