| US 7,565,592 B2 | ||
| Failure analysis and testing of semi-conductor devices using intelligent software on automated test equipment (ATE) | ||
| Roger Yacobucci, Fort Collins, Colo. (US) | ||
| Assigned to LSI Corporation, Milpitas, Calif. (US) | ||
| Filed on Dec. 27, 2007, as Appl. No. 11/964,920. | ||
| Application 11/964920 is a division of application No. 11/670031, filed on Feb. 01, 2007, granted, now 7,430,700. | ||
| Application 11/670031 is a division of application No. 11/028695, filed on Jan. 04, 2005, granted, now 7,203,877. | ||
| Prior Publication US 2008/0162070 A1, Jul. 03, 2008 | ||
| Int. Cl. G01R 31/30 (2006.01); G01R 31/08 (2006.01) | ||
| U.S. Cl. 714—745 [324/522] | 3 Claims |

| 1. A method to curve trace device buffers on an ATE, said method comprising the steps of:
a) defining a predetermined pin list which is set to include all pins during pattern loads;
b) modifying said predetermined pin list using a predetermined debugger command in order to include desired pins for characterization
using an appropriate computer program;
c) having said appropriate computer program query a user regarding a plurality of items;
d) reading one of said pins from said predetermined pin list;
e) using pin measurement units to force incrementally increasing voltage from zero volts until a predefined maximum current
limit is reached;
f) flagging any problem pins identified in step (e) and storing values at each increment to data files;
g) using pin measurement units to force incrementally decreasing voltage from zero to a predefined minimum current limit is
reached;
h) flagging any problem pins identified in step (g) and storing values at each increment to data files; and
i) if all of said pins in said predetermined pin list have not been evaluated, returning to step (d).
|