US 7,565,468 B2
Integrated circuit memory device and signaling method for adjusting drive strength based on topography of integrated circuit devices
Mark A. Horowitz, Menlo Park, Calif. (US); Richard M. Barth, Palo Alto, Calif. (US); Craig E. Hampel, San Jose, Calif. (US); Alfredo Moncayo, Redwood City, Calif. (US); Kevin S. Donnelly, Los Altos, Calif. (US); and Jared L. Zerbe, Woodside, Calif. (US)
Assigned to Rambus Inc., Los Altos, Calif. (US)
Filed on Oct. 30, 2007, as Appl. No. 11/929,974.
Application 11/929974 is a continuation of application No. 11/672018, filed on Feb. 06, 2007, abandoned.
Application 11/672018 is a continuation of application No. 11/181411, filed on Jul. 13, 2005, granted, now 7,174,400.
Application 11/181411 is a continuation of application No. 11/073403, filed on Mar. 04, 2005, granted, now 7,032,058.
Application 11/073403 is a continuation of application No. 10/742247, filed on Dec. 19, 2003, granted, now 7,032,057.
Application 10/742247 is a continuation of application No. 10/359061, filed on Feb. 04, 2003, granted, now 6,684,263.
Application 10/359061 is a continuation of application No. 09/910217, filed on Jul. 19, 2001, granted, now 6,516,365.
Application 09/910217 is a continuation of application No. 09/420949, filed on Oct. 19, 1999, granted, now 6,321,282.
Prior Publication US 2008/0052440 A1, Feb. 28, 2008
Int. Cl. G06F 13/00 (2006.01); G05F 1/10 (2006.01)
U.S. Cl. 710—104  [327/535; 326/80; 365/189.011] 22 Claims
OG exemplary drawing
 
1. An integrated circuit memory device comprising:
an output driver;
a first register to store a value representative of a drive strength setting of the output driver, wherein the value is determined based on a topography of a plurality of integrated circuit memory devices, including the integrated circuit memory device, that are coupled to a bus; and
a transmitter circuit including the output driver to output data using the drive strength setting and synchronously with respect to an external clock signal.