US 7,565,287 B2
Methods and apparatus for efficient vocoder implementations
Ali Soheil Sadri, Cary, N.C. (US); Navin Jaffer, Chapel Hill, N.C. (US); Anissim A. Silivra, Chapel Hill, N.C. (US); Bin Huang, Chapel Hill, N.C. (US); and Matthew Plonski, Morrisville, N.C. (US)
Assigned to Altera Corporation, San Jose, Calif. (US)
Filed on Dec. 20, 2005, as Appl. No. 11/312,176.
Application 11/312176 is a continuation of application No. 10/013908, filed on Oct. 19, 2001, granted, now 7,003,450.
Claims priority of provisional application 60/241940, filed on Oct. 20, 2000.
Prior Publication US 2006/0100865 A1, May 11, 2006
This patent is subject to a terminal disclaimer.
Int. Cl. G10L 19/12 (2006.01)
U.S. Cl. 704—221  [704/200; 704/201; 704/210; 712/10; 712/11; 712/16; 712/22] 9 Claims
OG exemplary drawing
 
1. A method for establishing converted vocoder code by converting a standard vocoder code implementation to execute on a single instruction multiple data (SIMD) array processor having a plurality of parallel processing elements, the method comprising:
removing conditional jumps found in the standard vocoder code implementation; and
modifying a loop control found in the standard vocoder code implementation which determines a number of cycles of execution to not depend on data being processed, the modifying step further comprises:
setting the modified loop control to a predetermined number so each parallel processing element takes the same set number of cycles regardless of the data processed by each parallel processing element.