| US 7,564,133 B2 | ||
| Semiconductor device and method for fabricating the same | ||
| Masakazu Hamada, Osaka (Japan); Kazuyoshi Maekawa, Tokyo (Japan); and Kenichi Mori, Tokyo (Japan) | ||
| Assigned to Panasonic Corporation, Osaka (Japan); and Renesas Technology, Corp., Tokyo (Japan) | ||
| Filed on Apr. 04, 2006, as Appl. No. 11/396,645. | ||
| Claims priority of application No. 2005-107190 (JP), filed on Apr. 04, 2005. | ||
| Prior Publication US 2006/0223325 A1, Oct. 05, 2006 | ||
| Int. Cl. H01L 23/40 (2006.01) | ||
| U.S. Cl. 257—750 [257/751; 438/700] | 7 Claims |
| 1. A semiconductor device comprising:
a lower interconnect formed over a semiconductor substrate;
an insulating film formed on the lower interconnect; a via hole penetrating the insulating film to reach the lower interconnect;
a first barrier film covering bottom and side surfaces of the via hole; and
a metal film filling the via hole covered with the first barrier film,
wherein a portion of the first barrier film covering a region of the side surface of the via hole located below an interface
between the insulating film and the lower interconnect is thicker than a portion of the first barrier film covering the bottom
surface of the via hole.
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