| US 7,564,097 B2 | ||
| Trench-gated MOSFET including schottky diode therein | ||
| Syotaro Ono, Yokohama (Japan); Akio Nakagawa, Fujisawa (Japan); Yusuke Kawaguchi, Miura-gun (Japan); and Yoshihiro Yamaguchi, Saitama (Japan) | ||
| Assigned to Kabushiki Kaisha Toshiba, Tokyo (Japan) | ||
| Filed on Apr. 25, 2007, as Appl. No. 11/740,045. | ||
| Application 11/740045 is a division of application No. 11/127224, filed on May 12, 2005, granted, now 7,230,297. | ||
| Claims priority of application No. 2004-145265 (JP), filed on May 14, 2004; and application No. 2005-112645 (JP), filed on Apr. 08, 2005. | ||
| Prior Publication US 2007/0194372 A1, Aug. 23, 2007 | ||
| Int. Cl. H01L 29/94 (2006.01) | ||
| U.S. Cl. 257—330 [257/E29.013] | 6 Claims |
| 1. A trench MOSFET, comprising:
a gate electrode having a trench gate structure;
a gate insulating film formed to surround the gate electrode;
an n-type diffusion layer formed to face the gate electrode via the gate insulating film at an upper portion of the trench;
a p-type base layer formed to face the gate electrode via the gate insulating film at a lower portion than the upper portion
of the trench;
an n-type epitaxial layer locating to face the gate electrode via the gate insulating film at a further lower portion than
the lower portion of the trench;
a metal layer formed departing from the trench in parallel with a depth direction of the trench, the metal layer penetrating
the n-type diffusion layer and the p-type base layer to reach the n-type epitaxial layer; and
a p-type layer with higher impurity concentration than the p-type base layer, locating to be in contact with the p-type base
layer and the metal layer.
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