| US 7,564,089 B2 | ||
| Semiconductor device | ||
| Soichi Yamazaki, Yokohama (Japan); Katsuaki Natori, Yokohama (Japan); and Koji Yamakawa, Tokyo (Japan) | ||
| Assigned to Kabushiki Kaisha Toshiba, Tokyo (Japan) | ||
| Filed on Aug. 05, 2004, as Appl. No. 10/911,501. | ||
| Claims priority of application No. 2004-092434 (JP), filed on Mar. 26, 2004. | ||
| Prior Publication US 2005/0212028 A1, Sep. 29, 2005 | ||
| Int. Cl. H01L 27/108 (2006.01) | ||
| U.S. Cl. 257—306 [257/307; 257/309; 257/310; 257/534] | 4 Claims |
| 1. A semiconductor device comprising:
a semiconductor substrate; and
a first capacitor provided above the semiconductor substrate, and including a bottom electrode, a dielectric film formed on
the bottom electrode and including a ferroelectric film formed of a metal oxide, and a top electrode formed on the dielectric
film and having a rectangular first pattern and a plurality of convex patterns projecting from four sides of the rectangular
first pattern,
wherein the dielectric film has convex patterns corresponding to the convex patterns of the top electrode, and the first capacitor
is based on interlayer capacitive coupling between the bottom electrode and the top electrode, and
wherein the bottom electrode has a first part which is located directly under the rectangular first pattern and which is not
electrically connected to the rectangular first pattern.
|