| US RE42,551 E1 | ||
| Block locking apparatus for flash memory | ||
| Vishram Prakash Dalvi, Folsom, Calif. (US); Rodney R. Rozman, Placerville, Calif. (US); Christopher John Haid, Folsom, Calif. (US); Jerry Kreifels, El Dorado Hills, Calif. (US); Joseph Tsang, Elk Grove, Calif. (US); Jeff Evertt, Kirkland, Wash. (US); Jahanshir J. Javanifard, Sacramento, Calif. (US); and Jeffrey J. Peterson, Folsom, Calif. (US) | ||
| Filed on Mar. 07, 2002, as Appl. No. 10/94,056. | ||
| Application 10/094056 is a reissue of application No. 08/794283, filed on Feb. 03, 1997, now 6,035,401, filed on Mar. 07, 2000. | ||
| Int. Cl. H04L 9/32 (2006.01) | ||
| U.S. Cl. 726—26 [726/27] | 18 Claims |
| 1. A memory device comprising:
a first flash memory array including a plurality of memory blocks each having a memory cell;
control circuitry coupled to the first memory array and controlling updating of the memory cells; and
a second independent flash memory array coupled to the control circuitry and including a plurality of block lock-bits each
corresponding to one of the plurality of memory blocks, wherein each block lock-bit controls updating of the corresponding
memory block.
|