| US 7,560,762 B2 | ||
| Asymmetric floating gate NAND flash memory | ||
| Yen-Hao Shih, Changhua County (Taiwan); Chia-Hua Ho, Kaohsiung (Taiwan); Hang-Ting Lue, Hsinchu (Taiwan); Erh-Kun Lai, Taichung County (Taiwan); and Kuang Yeu Hsieh, Hsin Chu (Taiwan) | ||
| Assigned to Macronix International Co., Ltd., Hsinchu (Taiwan) | ||
| Filed on Aug. 23, 2005, as Appl. No. 11/209,437. | ||
| Prior Publication US 2007/0090442 A1, Apr. 26, 2007 | ||
| Int. Cl. H01L 29/80 (2006.01) | ||
| U.S. Cl. 257—314 [257/288] | 10 Claims |
| 1. A memory device, comprising:
a substrate;
a plurality of wordlines disposed on and electrically insulated from the substrate;
and floating gates asymmetrically overlying respective wordlines, wherein a coupling ratio between a given one of the wordlines
and its corresponding floating gate is sufficiently strong to induce an inversion channel below the corresponding floating
gate.
|