| US 7,560,337 B2 | ||
| Programmable resistive RAM and manufacturing method | ||
| ChiaHua Ho, Kaohsiung (Taiwan); Erh-Kun Lai, Taichung County (Taiwan); and Kuang Yeu Hsieh, Hsinchu (Taiwan) | ||
| Assigned to Macronix International Co., Ltd., Hsinchu (Taiwan) | ||
| Filed on Jun. 23, 2006, as Appl. No. 11/426,213. | ||
| Claims priority of provisional application 60/757368, filed on Jan. 09, 2006. | ||
| Prior Publication US 2007/0173019 A1, Jul. 26, 2007 | ||
| Int. Cl. H01L 21/336 (2006.01) | ||
| U.S. Cl. 438—257 [438/95; 257/E27.084] | 20 Claims |
| 1. A method of forming an integrated circuit with nonvolatile memory cells, comprising:
forming conductive rows accessing the nonvolatile memory cells by row;
forming dielectric layers above said conductive rows, the dielectric layers including a first dielectric layer and a second
dielectric layer above the first dielectric layer, the first dielectric layer and the second dielectric layer having different
etch rates;
forming interlayer contacts through the dielectric layers to conductively connect with the conductive rows;
reducing a cross-section of a part of the interlayer contacts;
forming programmable resistive elements of the nonvolatile memory cells over the interlayer contacts, the interlayer contacts
including a first part adjacent to and conductively connected to at least one of the programmable resistive elements, the
first part having a top surface, wherein the top surface is higher than the second dielectric layer; and
forming conductive columns accessing the nonvolatile memory cells by column to conductively connect with the programmable
resistive elements.
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