US 7,560,307 B2
Resin composition, heat-resistant resin paste and semiconductor device using these and method of preparing the same
Yasuhiro Yano, Ichihara (Japan); Hidekazu Matsuura, Ichihara (Japan); Yoshihiro Nomura, Ichihara (Japan); Yoshii Morishita, Hitachi (Japan); Touichi Sakata, Hitachinaka (Japan); Hiroshi Nishizawa, Kitaibaraki (Japan); Toshiaki Tanaka, Tsukuba (Japan); Masaaki Yasuda, Tsukuba (Japan); and Aizou Kaneda, Yokohama (Japan)
Assigned to Hitachi Chemical Company, Ltd., Tokyo (Japan)
Filed on Apr. 14, 2006, as Appl. No. 11/403,810.
Application 11/403810 is a division of application No. 10/220846, filed on Sep. 06, 2002, granted, now 7,061,081.
Claims priority of application No. 2000-65718 (JP), filed on Mar. 06, 2000; application No. 2000-70975 (JP), filed on Mar. 09, 2000; application No. 2000-71023 (JP), filed on Mar. 09, 2000; application No. 2000-71024 (JP), filed on Mar. 09, 2000; application No. 2000-71025 (JP), filed on Mar. 09, 2000; and application No. 2000-224762 (JP), filed on Jul. 26, 2000.
Prior Publication US 2006/0180908 A1, Aug. 17, 2006
Int. Cl. H01L 21/50 (2006.01); H01L 21/48 (2006.01); H01L 21/44 (2006.01); H01L 21/4763 (2006.01); H01L 21/469 (2006.01); H01L 21/31 (2006.01)
U.S. Cl. 438—113  [438/622; 438/623; 438/637; 438/629; 438/118; 438/778] 6 Claims
OG exemplary drawing
 
1. A method of producing a semiconductor device which comprises a step of forming a plural number of resin layers on a semiconductor wafer on which a first wiring layer has been formed by printing a resin having a modulus of elasticity at 25° C. of 0.2 to 3.0 GPa, a glass transition temperature oil 180° C. or higher and a 5% weight-loss temperature of 300° C. or higher; a step of forming a second wiring layer on the resin layer which is electrically connected to an electrode on the semiconductor wafer; a step of forming a plural number of protective layers of the second wiring layer by printing the above resin on the second wiring layer; a step of providing a through hole(s) at the protective layer of the second wiring layer penetrating to the second wiring layer; and a step of forming an outer electrode terminal to the through hole(s); and a step of cutting the semiconductor wafer at a cutting portion to obtain respective semiconductor devices, wherein a range of the printing of the resin layer is a range excluding the cutting portion.