US 7,558,972 B2
Data processing apparatus
Masashi Hoshino, Fukuoka (Japan); and Masahiro Ohashi, Kasuya-Gun (Japan)
Assigned to Panasonic Corporation, Osaka (Japan)
Filed on Jan. 24, 2006, as Appl. No. 11/337,591.
Claims priority of application No. 2005-016454 (JP), filed on Jan. 25, 2005.
Prior Publication US 2006/0190514 A1, Aug. 24, 2006
Int. Cl. G06F 1/00 (2006.01); G06F 7/38 (2006.01)
U.S. Cl. 713—300  [708/233] 2 Claims
OG exemplary drawing
 
1. A data processing apparatus comprising:
a plurality of calculating units connected to each other in series, each of said plurality of calculating units being configured to perform an individually allotted calculation in a unit cycle, the unit cycle including a predetermined time period;
a plurality of memory units connected between said plurality of calculating units, in such a manner that each of said plurality of memory units and each of said plurality of calculating units are connected alternately; and
a control unit configured to select a calculating unit to perform the individually allotted calculation in a certain unit cycle, among said plurality of calculating units,
wherein said control unit selects a calculating unit to perform the individually allotted calculation in a certain unit cycle among said plurality of calculating units according to notified permissible time information on regarding a total processing time required for each of said plurality of calculating units to perform the individually allotted calculation, and
wherein said control unit sets an input interval of data inputted to a first stage calculating unit of said plurality of calculating units according to the permissible time information, then selects a calculating unit to perform the individually allotted calculation in a certain unit cycle, among said plurality of calculating units according to the set input interval.