| US 7,558,123 B2 | ||
| Efficient and systematic measurement flow on drain voltage for different trimming in flash silicon characterization | ||
| Woon-Sang Pui, Johor (Malaysia); Kian-Huat Hoo, Penang (Malaysia); and Joon-Siong Pang, Penang (Malaysia) | ||
| Assigned to Spansion LLC, Sunnyvale, Calif. (US) | ||
| Filed on Aug. 13, 2007, as Appl. No. 11/837,949. | ||
| Prior Publication US 2009/0049231 A1, Feb. 19, 2009 | ||
| Int. Cl. G11C 7/00 (2006.01) | ||
| U.S. Cl. 365—189.011 [365/189.01; 365/189.17; 365/230.01; 365/210.12; 365/233.12] | 20 Claims |
| 1. A system that facilitates characterization of a memory, comprising:
a characterization component that utilizes external address bits that are fixed to facilitate control and measurement of drain
voltage levels associated with a drain for respective operations in the memory to facilitate characterization of the memory,
the characterization component detects if an operation has been performed based on a portion of an address bit combination
and performs the operation if it has not yet been performed and bypasses the operation if the operation has been performed;
and
the memory that includes a memory array associated with the drain.
|