US 7,557,815 B2
System and method for producing a video signal
Jeff S. Ford, Madison, Ala. (US); and Claude Denton, Beaverton, Oreg. (US)
Assigned to Microsoft Corporation, Redmond, Wash. (US)
Filed on Oct. 28, 2005, as Appl. No. 11/261,114.
Application 11/261114 is a continuation of application No. 10/977589, filed on Oct. 29, 2004, granted, now 7,015,925.
Application 10/977589 is a continuation of application No. 09/632452, filed on Aug. 04, 2000, granted, now 6,885,381.
Claims priority of provisional application 60/147668, filed on Aug. 06, 1999.
Claims priority of provisional application 60/147609, filed on Aug. 06, 1999.
Prior Publication US 2006/0092159 A1, May 04, 2006
Int. Cl. G09G 5/02 (2006.01)
U.S. Cl. 345—591  [345/597; 345/604] 20 Claims
OG exemplary drawing
 
14. A method for producing video signals using a video output system within a video graphics workstation, the method comprising:
receiving a video signal in a receiver of the video output system, wherein the received video signal is forwarded from a video signal source within the video graphics workstation;
converting the received video signal into a second video signal having a common video data format by a processor coupled to the receiver;
transferring the received video signal through a buffer;
post-processing the received video signal through a video pipeline of the video output system, producing a post-processed video signal;
inserting generated ancillary data into the of post-processed video signal by an ancillary data injector, the ancillary data comprising at least one of audio data or close captioning data;
synchronizing by a generator locking device, a display of the post-processed video signals with graphics; and
converting the post-processed video signal in a video output module of the video output system, producing a formatted video signal,
wherein the video output system is configured to receive the received video signal from a storage medium, a video graphics processor, and a video input system, the video output system is communicatively coupled to the storage medium, the video graphics processor, and the video input system by electrical communication paths comprising a plurality of Peripheral Component Interconnect buses.