| US 7,557,741 B2 | ||
| Overload detection unit with signal strength indicator to indicate an overload condition | ||
| Robert Van Veldhoven, Dommelen (Netherlands) | ||
| Assigned to NXP B.V., Eindhoven (Netherlands) | ||
| Appl. No. 11/910,451 PCT Filed Mar. 28, 2006, PCT No. PCT/IB2006/050937 § 371(c)(1), (2), (4) Date Oct. 01, 2007, PCT Pub. No. WO2006/103626, PCT Pub. Date Oct. 05, 2006. |
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| Claims priority of application No. 05300243 (EP), filed on Apr. 01, 2005. | ||
| Prior Publication US 2008/0191914 A1, Aug. 14, 2008 | ||
| Int. Cl. H03M 1/00 (2006.01) | ||
| U.S. Cl. 341—139 [341/143; 341/155] | 9 Claims |
| 1. Device for digitally processing an input signal that is susceptible to variations in signal strength and is converted by
an analog to digital converter into a bitstream signal to be processed, the bitstream signal representing the input signal
by consecutive digital values, the device comprising
a signal strength detection circuit for generating a control signal indicative for an overload condition in which the signal
strength exceeds an input range of the analog to digital converter,
the signal strength detection circuit comprising detection means for detecting in the bitstream signal a sequence of adjacent
and equal digital values, the sequence having at least a predetermined length, wherein the detection means is further configured
to count a number of consecutive bits having equal digital values.
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