| US 7,557,620 B2 | ||
| System and method for controlling input buffer biasing current | ||
| Dong Pan, Boise, Id. (US) | ||
| Assigned to Micron Technology, Inc., Boise, Id. (US) | ||
| Filed on Sep. 18, 2006, as Appl. No. 11/522,636. | ||
| Application 11/522636 is a continuation of application No. 10/925234, filed on Aug. 23, 2004, granted, now 7,227,402, filed on Jun. 05, 2007. | ||
| Prior Publication US 2007/0008017 A1, Jan. 11, 2007 | ||
| This patent is subject to a terminal disclaimer. | ||
| Int. Cl. H01H 61/02 (2006.01) | ||
| U.S. Cl. 327—108 [327/387; 326/82; 326/83] | 14 Claims |
| 1. A method for biasing an input buffer, comprising:
comparing a reference current with a representative bias current indicator as determined from a replica of the input buffer;
adjusting a bias current in the replica of the input buffer while comparing the reference current and the representative bias
current indicator; and
biasing the input buffer equivalently with the replica of the input buffer when the difference between the reference current
and the representative bias current indicator is minimized.
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