| US 7,557,404 B2 | ||
| Nonvolatile memory devices and methods of forming the same | ||
| Kwang-Wook Koh, Seoul (Korea, Republic of); and Hee-Seog Jeon, Suwon-si (Korea, Republic of) | ||
| Assigned to Samsung Electronics Co., Ltd., (Korea, Republic of) | ||
| Filed on Feb. 08, 2007, as Appl. No. 11/704,003. | ||
| Claims priority of application No. 10-2006-0012710 (KR), filed on Feb. 09, 2006. | ||
| Prior Publication US 2007/0194369 A1, Aug. 23, 2007 | ||
| Int. Cl. H01L 29/788 (2006.01) | ||
| U.S. Cl. 257—315 [257/324; 257/E29.129] | 12 Claims |
| 1. A nonvolatile memory device comprising:
a semiconductor substrate having a device isolation layer defining an active region;
a pair of nonvolatile memory transistors on the active region;
a select transistor disposed between the pair of nonvolatile memory transistors; and
floating diffusion regions on the active region between each of the nonvolatile memory transistors and the select transistor,
wherein the select transistor includes a gate insulation layer having a thickness and a material that are the same as those
of gate insulation layers of the nonvolatile memory transistors.
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