| US 7,557,033 B2 | ||
| Method of forming metal line of semiconductor memory device | ||
| Eun Soo Kim, Incheon (Korea, Republic of); Seung Hee Hong, Seoul (Korea, Republic of); Cheol Mo Jeong, Kyeongki-do (Korea, Republic of); and Jung Geun Kim, Seoul (Korea, Republic of) | ||
| Assigned to Hynix Semiconductor Inc., Gyeonggi-do (Korea, Republic of) | ||
| Filed on Dec. 27, 2006, as Appl. No. 11/647,087. | ||
| Claims priority of application No. 10-2006-0060600 (KR), filed on Jun. 30, 2006. | ||
| Prior Publication US 2008/0003814 A1, Jan. 03, 2008 | ||
| Int. Cl. H01L 21/4763 (2006.01) | ||
| U.S. Cl. 438—636 [438/643; 438/653] | 8 Claims |
| 1. A method of forming a metal line of a semiconductor memory device, comprising:
forming an underlying layer over a semiconductor substrate;
forming a barrier metal layer, a metal layer and an anti-reflection layer on the underlying layer;
etching the anti-reflection layer, the metal layer and the barrier metal layer to form anti-reflection patterns, metal patterns,
and barrier metal patterns;
forming spacer layers on sidewalls of the anti-reflection patterns, the metal patterns, and the barrier metal patterns; and
forming a second interlayer insulating layer on the semiconductor substrate including the underlying layer.
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