| US 7,394,631 B2 | ||
| Electrostatic protection circuit | ||
| Kentaro Watanabe, Kawasaki (Japan); Koichi Sato, Yokohama (Japan); and Takayuki Hiraoka, Kawasaki (Japan) | ||
| Assigned to Kabushiki Kaisha Toshiba, Minato-ku, Tokyo (Japan) | ||
| Filed on Aug. 29, 2006, as Appl. No. 11/511,520. | ||
| Claims priority of application No. 2005-249898 (JP), filed on Aug. 30, 2005. | ||
| Prior Publication US 2007/0047162 A1, Mar. 01, 2007 | ||
| Int. Cl. H02H 3/22 (2006.01) | ||
| U.S. Cl. 361—56 [361/111] | 20 Claims |

| 1. An electrostatic protection circuit comprising:
a first power supply terminal;
a second power supply terminal;
an input-output terminal for an external connection;
a P-type MOSFET for a buffer for pulling up a potential of the input-output terminal to the potential of the first power supply
terminal;
an N-type MOSFET for the buffer for pulling down the potential of the input-output terminal to the potential of the second
power supply terminal;
a rectifying element having an anode terminal connected to the first power supply terminal and a cathode terminal connected
to the second power supply terminal;
a detector for comparing the potential of the input-output terminal to the potential of the first power supply terminal or
comparing the potential of the input-output terminal to the potential of the second power supply terminal to detect whether
or not an electrostatic surge is flowing into the input-output terminal; and
a controller for controlling a gate potential of one of the N-type MOSFET for the buffer and P-type MOSFET for the buffer
when the detector detects inflow of the electrostatic surge and turning off the MOSFET for the buffer of which gate potential
is controlled out of the N-type MOSFET for the buffer and P-type MOSFET for the buffer.
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