| US 7,394,239 B2 | ||
| Method and circuit arrangement for the self-testing of a reference voltage in electronic components | ||
| Martin Kadner, Hamburg (Germany) | ||
| Assigned to NXP B.V., Eindhoven (Netherlands) | ||
| Appl. No. 10/562,074 PCT Filed Jun. 17, 2004, PCT No. PCT/IB2004/050927 § 371(c)(1), (2), (4) Date Apr. 12, 2007, PCT Pub. No. WO2004/013937, PCT Pub. Date Dec. 29, 2004. |
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| Claims priority of application No. 03101870 (EP), filed on Jun. 25, 2003. | ||
| Prior Publication US 2007/0216395 A1, Sep. 20, 2007 | ||
| Int. Cl. G01R 25/00 (2006.01); G01R 31/02 (2006.01) | ||
| U.S. Cl. 324—76.77 [324/755; 324/763] | 8 Claims |

| 1. A method for the self-testing of a reference voltage in electronic components, characterized in that the reference voltage is fed to a voltage-controlled oscillator (VCO) whose output forms the input to a Wien-Robinson bridge whose output signal is checked in a phase detector for its phase shift relative to the input to the Wien-Robinson bridge to check the balance of the Wien-Robinson bridge, the Wien-Robinson bridge being set to be balanced at a frequency that is generated in the (VCO) at the nominal value selected for the reference voltage, and a pass signal is generated if the Wien-Robinson bridge is balanced and a fail signal is generated if it is not. |