| US 7,394,146 B2 | ||
| MOSFET package | ||
| Ryoichi Kajiwara, Hitachi (Japan); Masahiro Koizumi, Hitachi (Japan); Toshiaki Morita, Hitachi (Japan); Kazuya Takahashi, Hitachinaka (Japan); Munehisa Kishimoto, Kamakura (Japan); Shigeru Ishii, Tomiya-machi (Japan); Toshinori Hirashima, Takasaki (Japan); Yasushi Takahashi, Takasaki (Japan); Toshiyuki Hata, Maebashi (Japan); Hiroshi Sato, Takasaki (Japan); and Keiichi Ookawa, Takasaki (Japan) | ||
| Assigned to Renesas Tehcnology Corp., Tokyo (Japan); and Hitachi Tohbu Semiconductor, Ltd., Takasaki-Shi (Japan) | ||
| Filed on Oct. 31, 2006, as Appl. No. 11/589,849. | ||
| Application 10/855432 is a division of application No. 09/493080, filed on Jan. 28, 2000, granted, now 6,774,466. | ||
| Application 11/589849 is a continuation of application No. 11/415291, filed on May 02, 2006, granted, now 7,332,757. | ||
| Application 11/415291 is a continuation of application No. 10/855432, filed on May 28, 2004, abandoned. | ||
| Claims priority of application No. 11-19431 (JP), filed on Jan. 28, 1999; and application No. 11-160539 (JP), filed on Jun. 08, 1999. | ||
| Prior Publication US 2007/0040249 A1, Feb. 22, 2007 | ||
| This patent is subject to a terminal disclaimer. | ||
| Int. Cl. H01L 23/495 (2006.01); H01L 21/00 (2006.01); H01R 9/00 (2006.01) | ||
| U.S. Cl. 257—672 [257/676; 257/690; 257/735; 361/773; 361/813; 438/123] | 30 Claims |
| 1. A semiconductor device comprising:
a semiconductor chip having a first major surface and a second major surface opposite to said first major surface, said semiconductor
chip including a MOSFET, a first electrode of said MOSFET disposed on said first major surface and a second electrode of said
MOSFET disposed on said second major surface;
a first conductive member having a first inner surface and a first outer surface opposite to said first inner surface, electrically
connected with said first electrode, wherein said first inner surface faces said first electrode;
a second conductive member having a second inner surface and a second outer surface opposite to said second inner surface,
electrically connected with said second electrode;
a resin body covering said semiconductor chip and parts of said first and second conductive members; and
wherein said first outer surface of said first conductive member is exposed from said resin body, and
wherein said second conductive member includes a first part and a second part,
said first part contains an exposed portion of said second outer surface which is exposed from said resin body and a portion
of said second inner surface which faces said second electrode and is opposite to the exposed portion of said second outer
surface, and
said second part extends in a direction crossing a plane containing said second major surface of said semiconductor chip.
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