| US 7,394,101 B2 | ||
| Semiconductor device | ||
| Minoru Watanabe, Kanagawa-ken (Japan); Noriyuki Kaifu, Tokyo (Japan); and Chiori Mochizuki, Kanagawa-ken (Japan) | ||
| Assigned to Canon Kabushiki Kaisha, Tokyo (Japan) | ||
| Filed on Dec. 09, 2005, as Appl. No. 11/297,414. | ||
| Application 11/297414 is a division of application No. 10/969875, filed on Oct. 22, 2004, granted, now 7,098,481. | ||
| Application 10/969875 is a division of application No. 10/305981, filed on Nov. 29, 2002, granted, now 6,909,116. | ||
| Application 10/305981 is a division of application No. 09/384424, filed on Aug. 27, 1999, granted, now 6,586,769. | ||
| Claims priority of application No. 10-246151 (JP), filed on Aug. 31, 1998; and application No. 11-235770 (JP), filed on Aug. 23, 1999. | ||
| Prior Publication US 2006/0087577 A1, Apr. 27, 2006 | ||
| This patent is subject to a terminal disclaimer. | ||
| Int. Cl. H01L 27/14 (2006.01); H01L 29/04 (2006.01); H01L 29/15 (2006.01); H01L 31/36 (2006.01) | ||
| U.S. Cl. 257—72 [257/291; 257/E27.133] | 5 Claims |
| 1. A photoelectric conversion device comprising:
a plurality of thin film transistors disposed on an insulating substrate;
a plurality of capacitors disposed on the insulating substrate, each capacitor having a first electrode connected to one of
a source and a drain of said thin film transistors;
a common electrode bias line connected to a second electrode of said capacitors for applying a bias for separating electrons
and holes generated by photoelectric conversion;
a plurality of gate lines which are connected to gate electrodes of said thin film transistors; and
a plurality of transfer lines connected to another of the sources and drains of said thin film transistors for transferring
electric charge generated by the photoelectric conversion,
wherein the common electrode bias line is connected electrically to the gates lines through a first resistor, and connected
electrically to the transfer lines through a second resistor.
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