| US 7,555,258 B2 | ||
| Integrated circuit device and low noise block down converter including same | ||
| Shoji Sakurai, Osaka (Japan); and Yoshiaki Nakano, Osaka (Japan) | ||
| Assigned to Sharp Kabushiki Kaisha, Osaka (Japan) | ||
| Filed on Aug. 09, 2006, as Appl. No. 11/500,904. | ||
| Claims priority of application No. 2005-232494 (JP), filed on Aug. 10, 2005. | ||
| Prior Publication US 2007/0037515 A1, Feb. 15, 2007 | ||
| Int. Cl. H04H 20/74 (2008.01) | ||
| U.S. Cl. 455—3.02 [455/78; 455/3.03; 455/562.1] | 15 Claims |
| 1. An integrated circuit device which has N inputs and M outputs, each of N input signals supplied to the respective N inputs
being divided into two divided input signals,
the integrated circuit device comprising:
N amplification sections each of which amplifies one of said divided input signals;
N bandwidth conversion section each of which subjects, to frequency conversion, the other one of said divided input signals;
and
a 2N×M switch section which (i) receives 2N input signals that are made up of 2N output signals supplied from the N amplification
sections and the N bandwidth conversion sections, and (ii) is controlled so as to output a signal, which is selected from
said 2N input signals, to an output selected from said M outputs.
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