| US 7,554,872 B2 | ||
| Semiconductor device including multi-chip | ||
| Kazushige Ayukawa, Kokubunji (Japan); Seiji Miura, Hachioji (Japan); and Yoshikazu Saitou, Hamura (Japan) | ||
| Assigned to Renesas Technology Corp., Tokyo (Japan) | ||
| Filed on Jan. 19, 2005, as Appl. No. 11/37,088. | ||
| Application 11/037088 is a continuation of application No. 10/411237, filed on Apr. 11, 2003, granted, now 6,847,575. | ||
| Application 10/411237 is a continuation of application No. 10/140945, filed on May 09, 2002, granted, now 6,587,393. | ||
| Application 10/140945 is a continuation of application No. 09/897503, filed on Jul. 03, 2001, granted, now 6,411,561. | ||
| Application 09/897503 is a continuation of application No. 09/803958, filed on Mar. 13, 2001, granted, now 6,392,950. | ||
| Claims priority of application No. 2000-161123 (JP), filed on May 26, 2000. | ||
| Prior Publication US 2005/0128853 A1, Jun. 16, 2005 | ||
| Int. Cl. G11C 8/00 (2006.01) | ||
| U.S. Cl. 365—230.03 [365/222; 365/233.5; 365/236] | 6 Claims |
| 1. A semiconductor device comprising:
a first memory array including a plurality of dynamic type memory cells; and
a memory controller receiving signals using a SRAM system and accessing the first memory array by converting the signals,
wherein the memory controller has a temperature measuring module and changes a refresh interval of the first memory array
according to the temperature detected by the temperature measurement module.
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