| US 7,554,403 B1 | ||
| Gainboost biasing circuit for low voltage operational amplifier design | ||
| Satoshi Sakurai, San Diego, Calif. (US) | ||
| Assigned to National Semiconductor Corporation, Santa Clara, Calif. (US) | ||
| Filed on Feb. 27, 2008, as Appl. No. 12/38,225. | ||
| Int. Cl. H03F 3/45 (2006.01) | ||
| U.S. Cl. 330—260 [330/278; 330/254] | 20 Claims |
| 1. A gain boosted cascode system, comprising:
a cascode based on a transconductance amplifier and a current buffer; and
a gain booster circuit coupled to the cascode optimally boosting a gain of the cascode by maintaining the transconductance
amplifier and the current buffer in respective saturation regions,
wherein the gain booster circuit is based on at least one feedback amplifier coupled in series with a main voltage control
transistor;
wherein the main voltage control transistor is maintained in a triode region;
and
wherein the maintaining the transconductance amplifier and the current buffer in the respective saturation regions is performed
through passing an appropriate amount of current through the main voltage control transistor.
|