| US 7,554,387 B1 | ||
| Precision on chip bias current generation | ||
| Satoshi Sakurai, San Diego, Calif. (US) | ||
| Assigned to National Semiconductor Corporation, Santa Clara, Calif. (US) | ||
| Filed on Feb. 27, 2008, as Appl. No. 12/38,125. | ||
| Int. Cl. G05F 1/10 (2006.01) | ||
| U.S. Cl. 327—538 | 20 Claims |
| 1. A bias current generation system, comprising:
a current generation circuit generating a first current based on a first voltage and
an external resistor;
a current mirror forwarding a second current proportional to the first current; and
at least one bias current generation circuit generating a bias current based on a second voltage over a resistance of a transistor
device,
wherein the transistor device is maintained in a triode region using a third voltage associated with the second current; and
wherein the resistance of the transistor device shares characteristics of a resistance of the external resistor.
|