CPC H01L 43/02 (2013.01) [H01L 43/10 (2013.01); H01L 43/12 (2013.01)] | 20 Claims |
1. A method for manufacturing semiconductor structure, the method comprising:
forming an insulation layer;
forming a first via trench in the insulation layer;
forming a barrier layer in the first via trench;
forming a bottom electrode via in the first via trench;
forming a magnetic tunneling junction (MTJ) layer above the bottom electrode via; and
performing an ion beam etching operation, comprising
patterning the MTJ layer to form an MTJ; and
removing a portion of the insulation layer from a top surface.
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