US 11,682,726 B2
High voltage semiconductor device and manufacturing method thereof
Tsung-Yu Yang, Chiayi County (TW); Shin-Hung Li, Nantou County (TW); Nien-Chung Li, Hsinchu (TW); and Chang-Po Hsiung, Hsinchu (TW)
Assigned to UNITED MICROELECTRONICS CORP., Hsin-Chu (TW)
Filed by UNITED MICROELECTRONICS CORP., Hsin-Chu (TW)
Filed on Jan. 27, 2021, as Appl. No. 17/159,166.
Claims priority of application No. 202011601728.1 (CN), filed on Dec. 30, 2020.
Prior Publication US 2022/0209009 A1, Jun. 30, 2022
Int. Cl. H01L 29/78 (2006.01); H01L 29/51 (2006.01); H01L 29/66 (2006.01); H01L 29/06 (2006.01); H01L 29/10 (2006.01)
CPC H01L 29/7824 (2013.01) [H01L 29/0649 (2013.01); H01L 29/1079 (2013.01); H01L 29/517 (2013.01); H01L 29/66689 (2013.01)] 10 Claims
OG exemplary drawing
 
1. A high voltage semiconductor device, comprising:
a semiconductor substrate comprising a channel region;
an isolation structure, wherein at least a part of the isolation structure is disposed in the semiconductor substrate and surrounds the channel region;
a gate oxide layer disposed on the semiconductor substrate, wherein the gate oxide layer comprises:
a first portion; and
a second portion disposed at two opposite sides of the first portion in a horizontal direction, wherein a thickness of the first portion is greater than a thickness of the second portion;
a gate structure disposed on the gate oxide layer and the isolation structure; and
two drift regions disposed in the semiconductor substrate and located at two opposite sides of the channel region in the horizontal direction respectively, wherein at least a part of the isolation structure is disposed in the two drift regions, and a part of each of the two drift regions is located between the isolation structure and the first portion of the gate oxide layer in the horizontal direction and located beneath the second portion of the gate oxide layer in a vertical direction perpendicular to the horizontal direction.