US 11,682,616 B2
Semiconductor structure and method for forming the same
Meng-Pei Lu, Hsinchu (TW); Shin-Yi Yang, New Taipei (TW); Shu-Wei Li, Hsinchu (TW); Chin-Lung Chung, Hsinchu (TW); and Ming-Han Lee, Taipei (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD., Hsinchu (TW)
Filed on Aug. 31, 2020, as Appl. No. 17/8,141.
Prior Publication US 2022/0068799 A1, Mar. 3, 2022
Int. Cl. H01L 23/522 (2006.01); H01L 23/532 (2006.01); H01L 21/768 (2006.01)
CPC H01L 23/5226 (2013.01) [H01L 21/7682 (2013.01); H01L 21/76802 (2013.01); H01L 21/76831 (2013.01); H01L 21/76843 (2013.01); H01L 21/76877 (2013.01); H01L 23/53295 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor structure comprising:
a substrate;
a plurality of conductive features disposed over the substrate, wherein each of the conductive features comprises:
a first metal layer;
a second metal layer between the first metal layer and the substrates;
a 2D material layer disposed between the first metal layer and the second metal layer:
an isolation structure between the conductive features and separating the conductive features from each other; and
a conductive via disposed over one of the conductive features, wherein a bottom of the conductive via is coupled to the first metal layer.