US 11,681,854 B2
Generation of layout including power delivery network
Chung-Chieh Yang, Hsinchu County (TW); Tai-Yi Chen, Hsinchu (TW); Yun-Ru Chen, Keelung (TW); and Yung-Chow Peng, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu (TW)
Filed on Mar. 24, 2022, as Appl. No. 17/703,898.
Application 17/703,898 is a continuation of application No. 16/886,550, filed on May 28, 2020, granted, now 11,308,255.
Prior Publication US 2022/0215152 A1, Jul. 7, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 30/398 (2020.01); G06F 30/392 (2020.01); G06F 30/367 (2020.01); G06F 30/3953 (2020.01); G06F 30/373 (2020.01); G06F 119/06 (2020.01)
CPC G06F 30/398 (2020.01) [G06F 30/367 (2020.01); G06F 30/392 (2020.01); G06F 30/3953 (2020.01); G06F 30/373 (2020.01); G06F 2119/06 (2020.01)] 20 Claims
OG exemplary drawing
 
1. A method, comprising:
generating, based on design information for an integrated circuit, a circuit design that includes an initial power delivery network (PDN) for the integrated circuit;
performing a pre-layout simulation to the circuit design that includes the initial power delivery network, to determine whether the circuit design meets a predetermined specification;
generating a circuit layout of the integrated circuit when the circuit design meets the predetermined specification; and
adding at least one additional conductive pillar or at least one additional power rail in the initial power delivery network according to a relationship of a pillar density of the initial power delivery network and a maximum pillar density when the circuit design does not meet the predetermined specification.