| CPC G06F 12/0862 (2013.01) [G06F 9/3001 (2013.01); G06F 2212/602 (2013.01)] | 7 Claims |
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1. An information processing device comprising an arithmetic processing unit, the arithmetic processing unit including:
a processor that executes a program;
a first cache memory;
a second cache memory that belongs to a memory hierarchy lower than a memory hierarchy of the first cache memory;
a determination unit that determines, on a basis of first information that indicates a virtual address of information accessed in the second cache memory when the program is executed, second information that indicates a virtual address of target information to be prefetched; and
a prefetch unit that prefetches the target information and stores the prefetched target information in the second cache memory,
wherein the second cache memory includes a conversion unit that converts, by using correspondence information that indicates a correspondence relationship between the physical address of the target information and the virtual address of the target information, the second information into third information that indicates a physical address of the target information, and
the prefetch unit prefetches the target information using the third information.
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