US 11,681,533 B2
Restricted speculative execution mode to prevent observable side effects
Ron Gabor, Herzliya (IL); Alaa Alameldeen, Hillsboro, OR (US); Abhishek Basak, Hillsboro, OR (US); Fangfei Liu, Hillsboro, OR (US); Francis McKeen, Portland, OR (US); Joseph Nuzman, Haifa (IL); Carlos Rozas, Portland, OR (US); Igor Yanover, Yokneam Illit (IL); and Xiang Zou, Hillsboro, OR (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Jun. 17, 2019, as Appl. No. 16/443,593.
Claims priority of provisional application 62/810,288, filed on Feb. 25, 2019.
Prior Publication US 2020/0272474 A1, Aug. 27, 2020
Int. Cl. G06F 9/30 (2018.01); G06F 9/38 (2018.01); G06F 12/1027 (2016.01); G06F 21/57 (2013.01)
CPC G06F 9/3842 (2013.01) [G06F 9/30043 (2013.01); G06F 9/30047 (2013.01); G06F 9/30101 (2013.01); G06F 9/30189 (2013.01); G06F 12/1027 (2013.01); G06F 21/57 (2013.01); G06F 2212/68 (2013.01); G06F 2221/034 (2013.01)] 15 Claims
OG exemplary drawing
 
1. A processor comprising:
configuration storage to store an indicator to enable a restricted speculative execution mode of operation of the processor, wherein the processor is to restrict speculative execution when operating in restricted speculative execution mode;
an execution circuit to perform speculative execution; and
a controller to restrict speculative execution by the execution circuit when the restricted speculative execution mode is enabled, wherein restricting speculative execution includes preventing training of a hardware prefetcher based on a prefetch operation without preventing the prefetch operation, and wherein the prefetch operation trains the hardware prefetcher while in a non-restricted speculative execution mode.