US 7,551,110 B1
Chopping and oversampling ADC having reduced low frequency drift
Anatoliy V. Tsyrganovich, San Jose, Calif. (US)
Assigned to ZiLog, Inc., San Jose, Calif. (US)
Filed on Apr. 21, 2008, as Appl. No. 12/148,715.
Application 12/148715 is a continuation of application No. 11/378785, filed on Mar. 18, 2006, granted, now 7,362,255.
This patent is subject to a terminal disclaimer.
Int. Cl. H03M 3/00 (2006.01)
U.S. Cl. 341—143  [329/307] 20 Claims
OG exemplary drawing
 
1. An integrated circuit, comprising:
a digital processor portion that fetches and executes instructions; and
means for receiving an analog signal directly from a sensor such that there is no amplifier outside the integrated circuit that is in a signal path of the analog signal between the sensor and the means for receiving, wherein the means is also for chopping the analog signal at a chopping frequency to generate a chopped analog signal and for amplifying the chopped analog signal, wherein the means amplifies the chopped analog signal before the chopped analog signal is filtered, the chopping frequency being substantially lower than a rate at which the means performs analog-to-digital conversions on the amplified chopped analog signal, the means also being for outputting an ADC output value that is a digital representation of a magnitude of the analog signal, wherein the digital processor portion receives the ADC output value from the means.