| US 7,550,801 B2 | ||
| Nonvolatile semiconductor memory device | ||
| Shoko Kikuchi, Tokyo (Japan); Naoki Yasuda, Yokohama (Japan); Koichi Muraoka, Sagamihara (Japan); Yukie Nishikawa, Kawasaki (Japan); and Hirotaka Nishino, Yokohama (Japan) | ||
| Assigned to Kabushiki Kaisha Toshiba, Tokyo (Japan) | ||
| Filed on May 15, 2006, as Appl. No. 11/433,422. | ||
| Claims priority of application No. 2005-236014 (JP), filed on Aug. 16, 2005. | ||
| Prior Publication US 2007/0042547 A1, Feb. 22, 2007 | ||
| Int. Cl. H01L 29/788 (2006.01) | ||
| U.S. Cl. 257—316 [257/E27.078; 438/261] | 7 Claims |
| 1. A nonvolatile semiconductor memory device comprising:
a tunnel insulating film which is formed on a surface of a semiconductor substrate;
a floating gate electrode which is formed on the tunnel insulating film, at least an interface region which the floating gate
electrode defines on a side opposite to that of the substrate, being made of n-type Si or metal-based conductive material;
an inter-electrode insulating film which is formed on the floating gate electrode and which is made of high-permittivity material,
the high-permittivity material being oxide, nitride or oxinitride containing at least one element selected from the group
consisting of Al, Hf, La, Y, Ce, Ti, Zr, Si, and Ta;
a control gate electrode which is formed on the inter-electrode insulating film, at least an interface region of which the
control gate electrode defines on a side of the inter-electrode insulating film, being made of a p-type semiconductor layer
containing at least one of Si and Ge; and
an n-type source/drain region formed in the surface of the semiconductor substrate.
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