| US 7,550,338 B2 | ||
| Method and structure for forming strained SI for CMOS devices | ||
| An L. Steegen, Stamford, Conn. (US); Haining S. Yang, Wappingers Falls, N.Y. (US); and Ying Zhang, Yorktown Heights, N.Y. (US) | ||
| Assigned to International Business Machines Corporation, Armonk, N.Y. (US) | ||
| Filed on Sep. 13, 2007, as Appl. No. 11/854,829. | ||
| Application 11/854829 is a division of application No. 11/534526, filed on Sep. 22, 2006, granted, now 7,429,752. | ||
| Application 11/534526 is a continuation of application No. 10/605906, filed on Nov. 05, 2003, granted, now 7,129,126. | ||
| Prior Publication US 2008/0003735 A1, Jan. 03, 2008 | ||
| Int. Cl. H01L 21/8238 (2006.01) | ||
| U.S. Cl. 438—199 [438/221; 257/E21.618] | 4 Claims |
| 3. A method for manufacturing a device including an n-type device and a p-type device, comprising:
growing a first strain layer on a semiconductor substrate;
growing a silicon layer above the first strain layer;
forming a gap between the semiconductor substrate and the silicon layer by removing at least a portion of the silicon layer
and the first strain layer from above the semiconductor substrate such that a portion of the silicon layer and a portion of
the first strain layer remains above the gap;
growing a second strain layer in the gap;
before the gap is formed, forming trenches in the semiconductor substrate;
before the growing of the second strain layer, forming spacer material on sidewalls; and
after the spacer material is formed, removing the spacer material.
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